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PCA2000U/AB Fiches technique(PDF) 10 Page - NXP Semiconductors

No de pièce PCA2000U/AB
Description  32 kHz watch circuit with programmable adaptive motor pulse
PDF  28 Pages
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Fabricant  NXP [NXP Semiconductors]
Site Internet  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCA2000U/AB Fiches technique(HTML) 10 Page - NXP Semiconductors

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PCA2000_2001_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 11 November 2008
10 of 28
NXP Semiconductors
PCA2000; PCA2001
32 kHz watch circuit with programmable adaptive motor pulse
7.6 Type recognition
Byte D is read to determine which type of the PCA200X family is used in a particular
application.
7.7 Programming procedure
For a watch it is essential that the timing calibration can be made after the watch is fully
assembled. In this situation, the supply pads are often the only terminals which are still
accessible.
Writing to the OTP cells and performing the related functional checks is achieved in the
PCA2000 and PCA2001 by modulating the supply voltage. The necessary control circuit
consists basically of a voltage level detector, an instruction counter which determines the
function to be performed, and an 8-bit shift register which allows writing to the OTP cells of
an 8-bit word in one step and acts as a data pointer for checking the OTP content.
There are six different instruction states (state 3 and state 5 are handled as state 4):
State 1: measurement of the quartz crystal oscillator frequency (divided by 1024)
State 2: measurement of the inhibition time
State 3: write/check word A
State 4: write/check word B
State 5: write/check word C
State 6: check word D (type recognition)
Each instruction state is switched on with a pulse to VP(prog)(start). After this large pulse, an
initial waiting time of t0 is required. The programming instructions are then entered by
modulating the supply voltage with small pulses (amplitude VP(mod) and pulse width tmod).
The first small pulse defines the start time, the following pulses perform three different
functions, depending on the time delay (td) from the preceding pulse
(see Figure 7, Figure 8, Figure 11 and Figure 12):
td =t1 (0.7 ms); increments the instruction counter
td =t2 (1.7 ms); clocks the shift register with data = logic 0
td =t3 (2.7 ms); clocks the shift register with data = logic 1
The programming procedure requires a stable oscillator. This means that a waiting time,
determined by the start-up time of the oscillator is necessary after power-up of the circuit.
After the VP(prog)(start) pulse, the instruction counter is in state 1 and the data shift register
is cleared.
Table 8.
Description of word D bits
Bit
Value
Description
Type recognition
1 to 4
0000
PCA2002
1000
PCA2000
0100
PCA2001
1100
PCA2003



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