TDA7421 datasheet(13/38 Pages) STMICROELECTRONICS

13 / 38 page

ELECTRICAL CHARACTERISTICS (continued)

Loop Filter Input Output

(LP_IN1, LP_IN2, LP_IN3, LP_OUT)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

-IIN

Input Leakage Current

VIN = GND; PDout = Tristate 1)

-2

µA

IIN

Input Leakage Current

VIN = VDD; PDout = Tristate

-2

µA

VOL

Output Voltage Low

IIN = -0.2mA; VCC = 8.5V

0.5

VOH

Output Voltage High

IOUT = 0.2mA; VCC = 8.5V

IOUT

Output Current Sink

VPLL = 8.5V;

IOUT

Output Current Source

Vout = 0.5 to 8V

2C Bus Interface

Symbol

Parameter

Test Condition

Min.

Typ.

Max

Unit

fSCL

SCL Clock Frequency

100

500

KHz

tAA

SCL Low to SDA Data Valid

300

tbuf

Time the Bus Must Be Free for

the New Transmission

4.7

µs

tHD-STA

START Condition hold Time

4.0

µs

tLOW

Clock Low Period

4.7

µs

tHIGH

Clock High Period

4.0

µs

tSU-SDA

Start Condition Setup Time

4.7

µs

tHD-DAT

Data Input Hold Time

µs

tSU-DAT

Date Input Setup Time

250

SDA & SCL Rise Time

µs

SDA & SCL Full Time

µs

tSU-STO

Stop Condition Setup Time

4.7

µs

tDH

DATA OUT Time

300

VIL

Input Low Voltage

VIH

Input High Voltage

(1) depends upon filter circuitry

(2) depends upon application circuit

(3) depends only upon IF2 ceramic filter

TDA7421

13/38

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