TDA7319D datasheet(8/16 Pages) STMICROELECTRONICS

No de pièce	TDA7319D

Description	3 BAND DIGITAL CONTROLLED AUDIO PROCESSOR

PDF	16 Pages

Scroll/Zoom	100%

Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

Logo

8 / 16 page

SDA, SCL I

2CBUS TIMING

Symbol

Parameter

Min.

Typ.

Max.

Unit

fSCL

SCL clock frequency

400

kHz

tBUF

Bus free time between a STOP and START condition

1.3

µs

tHD:STA

Hold time (repeated) START condition. After this period, the first

clock pulse is generated

0.6

µs

tLOW

LOW period of the SCL clock

1.3

µs

tHIGH

HIGH period of the SCL clock

0.6

µs

tSU:STA

Set-up time for a repeated START condition

0.6

µs

tHD:DA

Data hold time

0.300

µs

tSU:DAT

Data set-up time

100

Rise time of both SDA and SCL signals

300

ns (*)

Fall time of both SDA and SCL signals

300

ns (*)

tSU:STO

Set-up time for STOP condition

0.6

µs

All values referred to VIH min. and VIL max. levels

(*) Must be guaranteed by the I

2C BUS master.

SDA

SCL

tBUF

tHD;STA

tLOW

tHD;DAT

tSU;DAT

tHIGH

tSU;STA

tHD;STA

tSP

tSU;STO

D95AU314

P = STOP

S = START

Definition of timing on the I

2C-bus

TDA7319

8/16

TDA7319D Fiches technique(PDF) 8 Page - STMicroelectronics

TDA7319D Fiches technique(HTML) 8 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

Fiches technique Télécharger

Lien URL