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7220 Fiches technique(PDF) 185 Page - Renesas Technology Corp

No de pièce 7220
Description  8-BIT SINGLE-CHIP MICROCOMPUTER
PDF  303 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

7220 Fiches technique(HTML) 185 Page - Renesas Technology Corp

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APPLICATION
5.1 Example of multi-line display
7220 Group User’s Manual
5-12
(4)
VSYNC interrupt processing routine when setting multiple interrupts
Figure 5.1.11 shows the flowchart of VSYNC interrupt processing routine when setting multiple interrupts.
A’ and B’ are the setting routines for multiple interrupts.
Fig. 5.1.11 Flowchart of VSYNC interrupt processing routine (when setting multiple interrupts)
VSYNC interrupt processing routine
RETURN
VSYNC interrupt processing
I
ICON1
ICON2
←ICON1
←ICON2
←“000000012”
←“000000002”
←“0”
V_ICON1
V_ICON2
ICON1 (address 00FE 16)
ICON2 (address 00FF 16)
I
Push registers X, Y, A
ICON1, ICON2:
V_ICON1, V_ICON2 :
A :
X :
Y :
T :
D :
Interrupt control registers 1, 2
Back up RAM for interrupt control
registers 1, 2 during V SYNC interrupt
Accumulator
Index register X
Index register Y
X modified operation mode flag
Decimal operation mode flag
←Disable all interrupts
←“1”
←V_ICON1
←V_ICON2
←Pop ICON 1 and 2 contents
during VSYNC interrupt
←“0”
←“0”
T
D
A’
Set routine for
multiple
interrupts
Pop the registers X, Y, A
Disable
multiple interrupts
←Enable Timer 1 interrupt to
take priority than V SYNC interrupt.
And also, be sure to disable the following interrupts:
-VSYNC interrupt
-all interrupts with lower priority than V SYNC
interrupt.
B’
Enable state of
multiple interrupts
(Timer 1)



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