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H8SX/1663R Fiches technique(PDF) 1173 Page - Renesas Technology Corp

No de pièce H8SX/1663R
Description  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Fabricant  RENESAS [Renesas Technology Corp]
Site Internet  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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Section 25 Flash Memory
Rev. 2.00 Sep. 24, 2008 Page 1141 of 1468
REJ09B0412-0200
(2)
State Transition Diagram
The state transition after SCI boot mode is initiated is shown in figure 25.8.
Wait for inquiry
setting command
Wait for
programming/erasing
command
Bit rate adjustment
Processing of
read/check command
Boot mode initiation
(reset by boot mode)
H'00, ..., H'00 reception
H'00 transmission
(adjustment completed)
(Bit rate adjustment)
Processing of
inquiry setting
command
All user MAT and
user boot MAT erasure
Wait for program data
Wait for erase-block
data
Read/check command
reception
Command response
(Erasure selection command
reception)
(Program data transmission)
(Erasure selection command reception)
(Programming
completion)
(Erase-block specification)
(Erasure
completion)
Inquiry command reception
H'55
rece
ption
Inquiry command response
1.
2.
3.
4.
Figure 25.8 SCI Boot Mode State Transition Diagram



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