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H8SX/1663R Fiches technique(PDF) 893 Page - Renesas Technology Corp |
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H8SX/1663R Fiches technique(HTML) 893 Page - Renesas Technology Corp |
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893 / 1504 page ![]() Section 18 Watchdog Timer (WDT) Rev. 2.00 Sep. 24, 2008 Page 861 of 1468 REJ09B0412-0200 TCNT value H'00 Time H'FF WT/ IT = 1 TME = 1 H'00 written to TCNT WT/ IT = 1 TME = 1 H'00 written to TCNT 133 states*2 519 states WDTOVF signal Internal reset signal*1 Notes: 1. If TCNT overflows when the RSTE bit is set to 1, an internal reset signal is generated. 2. 130 states when the RSTE bit is cleared to 0. Overflow WDTOVF and internal reset are generated WOVF = 1 Figure 18.2 Operation in Watchdog Timer Mode |
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