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HD26LS32P Fiches technique(PDF) 1 Page - Renesas Technology Corp |
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HD26LS32P Fiches technique(HTML) 1 Page - Renesas Technology Corp |
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1 / 15 page ![]() Rev.2.00, Jul.16.2004, page 1 of 14 HD26LS32 Quadruple Differential Line Receivers With 3 State Outputs REJ03D0295–0200Z (Previous ADE-205-577 (Z)) Rev.2.00 Jul.16.2004 Description The HD26LS32 features quadruple line receivers designed to meet the specs of EIA standard RS-422A and RS-423. This device operates from a single 5 V power supply. The enable function is common to all four receivers and offers a choice of active high or active low input. Fail safe design ensures that if the inputs are open, the outputs will always be high. Features • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD26LS32P DILP-16 pin (JEITA) DP-16E, -16FV P — HD26LS32FPEL SOP-16 pin (JEITA) FP-16DAV FP EL (2,000 pcs/reel) Note: Please consults the sales office for the above package availability. Logic Diagram 1Y 2Y 3Y 4Y 1A 1B 2A 2B 3A 3B 4A 4B Enable G Enable G |
Numéro de pièce similaire - HD26LS32P |
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Description similaire - HD26LS32P |
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