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M37542RSS Fiches technique(PDF) 39 Page - Renesas Technology Corp |
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M37542RSS Fiches technique(HTML) 39 Page - Renesas Technology Corp |
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39 / 122 page ![]() 7542 Group Rev.3.03 Jul 11, 2008 Page 39 of 117 REJ03B0006-0303 Fig. 44 Block diagram at modulation mode Compare buffer 00 (16) Compare latch 00 (16) Compare buffer 01 (16) Compare latch 01 (16) Data bus Compare register Compare register write pointer (001216, bits 0 to 2) Compare latch 00, 01 re-load bit (001416, bit 0) Timer A counter (16) Compare 0 (1) timer source bits (001F16, bit 0 (bit 1) Compare 0 trigger enable bit (002116, bit 4) Output latch Compare 0 output level latch (002116, bit 0) Compare 0 output status bit (002216, bit 0) Compare 0 output port bit (001E16, bit 2) P01/CMP0 Timer B counter (16) Compare 1 trigger enable bit (002116, bit 5) Output latch Compare 1 output level latch (002116, bit 1) Compare 1 output status bit (002216, bit 1) Underflow Compare latch 10 (16) Compare buffer 10 (16) Compare latch 11 (16) Compare buffer 11 (16) Data bus Compare register Compare latch 10, 11 re-load bit (001416, bit 1) Compare register write pointer (001216, bits 0 to 2) I/O port |
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