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M306V2EEFS Fiches technique(PDF) 235 Page - Renesas Technology Corp |
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M306V2EEFS Fiches technique(HTML) 235 Page - Renesas Technology Corp |
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235 / 271 page ![]() Rev.1.40 Oct 06, 2004 page 235 of 269 M306V2ME-XXXFP, M306V2EEFP Figure 2.17.2 Programmable I/O ports (3) symbolizes a parasitics diode. Do not apply a voltage higher than Vcc each port. P70, P71 Input to respective peripheral functions Data bus P57, P60, P61, P73, P74, P76 Data bus Pull-up selection Input to respective peripheral functions Data bus Pull-up selection P82, P83 Input to respective pefipheral functions Data bus P44–P47, P50–P54,P56, P63, P86 Pull-up selection Output “1” Direction register Port latch Direction register Port latch Direction register Port latch Output “1” Direction register Port latch Output “1” (Note) (Note) (Note) (Note) Note: |
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