M306V2EEFS datasheet(42/271 Pages) RENESAS

42 / 271 page

Rev.1.40

Oct 06, 2004 page 42 of 269

M306V2ME-XXXFP, M306V2EEFP

2.5.6 Wait Mode

When a WAIT instruction is executed, the BCLK stops and the microcomputer enters the wait mode. In

this mode, oscillation continues but the BCLK and watchdog timer stop. Writing “1” to the WAIT peripheral

function clock stop bit and executing a WAIT instruction stops the clock being supplied to the internal

peripheral functions, allowing power dissipation to be reduced. Table 2.5.3 shows the status of the ports

in wait mode.

Wait mode is cancelled by a hardware reset or an interrupt. If an interrupt is used to cancel wait mode, the

microcomputer restarts from the interrupt routine using as BCLK, the clock that had been selected when

the WAIT instruction was executed.

Table 2.5.3 Port status during wait mode

Memory expansion mode

Single-chip mode

Microprocessor mode

_______

Address bus, data bus, CS0 to CS3

Retains status before wait mode

_____

______

________

_________

RD, WR, BHE, WRL, WRH

“H”

__________

HLDA,BCLK

“H”

ALE

“H”

Port

Retains status before wait mode

CLKOUT

When fC selected

Valid only in single-chip mode

Does not stop

When f8, f32 selected Valid only in single-chip mode

Does not stop when the WAIT

peripheral function clock stop

bit is “0”.

When the WAIT peripheral

function clock stop bit is “1”,

the status immediately prior

to entering wait mode is main-

tained.

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