MSC7119 datasheet(44/60 Pages) FREESCALE

No de pièce	MSC7119

Description	Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC

PDF	60 Pages

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Fabricant	FREESCALE [Freescale Semiconductor, Inc]

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MSC7119 Data Sheet, Rev. 8

Hardware Design Considerations

Freescale Semiconductor

3.2.2.2

Case 2

The power-up sequence is as follows:

Turn on the VDDIO (3.3 V) supply first.

Turn on the VDDC (1.2 V) and VDDM (2.5 V) supplies simultaneously (second).

Turn on the VREF (1.25 V) supply last (third).

Note:

Make sure that the time interval between the ramp-up of VDDIO and VDDC/VDDM is less than 10 ms.

The power-down sequence is as follows:

Turn off the VREF (1.25 V) supply first.

Turn off the VDDM (2.5 V) supply second.

Turn off the VDDC (1.2 V) supply third.

Turn of the VDDIO (3.3 V) supply fourth (last).

Use the following guidelines:

•

Make sure that the time interval between the ramp-down for VDDIO and VDDC is less than 10 ms.

•

Make sure that the time interval between the ramp-up or ramp-down for VDDC and VDDM is less than 10 ms for

power-up and power-down.

•

Refer to Figure 31 for relative timing for Case 2.

Figure 31. Voltage Sequencing Case 2

Time

Ramp-down

Ramp-up

VDDIO = 3.3 V

VDDM = 2.5 V

VDDC = 1.2 V

VREF = 1.25 V

<10 ms

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