Pin description and connection diagrams

L6743, L6743Q

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2

Pin description and connection diagrams

Figure 3.

Pin connection (top view)

2.1

Pin description

1

2

3

4

LGATE

GND

PHASE

UGATE

VCC

EN

PWM

BOOT

5

6

7

8

L6743

1

2

3

4

GND

GND

PHASE

UGATE

VCC

EN

PWM

BOOT

7

8

9

10

L6743Q

56

LGATE

VCC

Table 2.

Pin description

Pin n

Name

Function

DFN10

SO-8

11

BOOT

High-side driver supply.

capacitor to the PHASE pin.

Internally connected to the cathode of the integrated bootstrap diode. See

Section 5.3 for guidance in designing the capacitor value.

22

PWM

Control input for the driver, 5 V compatible.

This pin controls the state of the driver and which external MOSFET have to be

turned-ON according to EN status. If left floating and in conjunction with EN

asserted, it causes the driver to enter the high-impedance (HiZ) state which causes

all MOSFETs to be OFF. See Section 5.1 for details about HiZ.

33

EN

Enable input for the driver. Internally pulled low by 15 k

Ω.

Pull high to enable the driver according to the PWM status. If pulled low will cause

the drive to enter HiZ state with all MOSFET OFF regardless of the PWM status.

See Section 5.1 for details about HiZ.

4, 5

4

VCC

Device and LS driver power supply. Connect to any voltage between 5 V and 12 V.

Bypass with low-ESR MLCC capacitor to GND.

65

LGATE

Low-side driver output.

Connect directly to the low-side MOSFET gate. A small series resistor can be useful

to reduce dissipated power especially in high frequency applications.

7, 8

6

GND

All internal references, logic and drivers are referenced to this pin. Connect to the

PCB ground plane.

9

7

PHASE

High-side driver return path. Connect to the high-side MOSFET source.

This pin is also monitored for the adaptive dead-time management and Pre-OV

Protection.

10

8

UGATE

High-side driver output.

Connect to high-side MOSFET gate.

PAD

-

TH. PAD

Thermal pad connects the Silicon substrate and makes good thermal contact with

the PCB. Connect to the PGND plane. (DFN10 only)