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M95010 Fiches technique(PDF) 24 Page - STMicroelectronics |
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M95010 Fiches technique(HTML) 24 Page - STMicroelectronics |
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24 / 42 page ![]() Power-up and delivery states M95040, M95020, M95010 24/42 7 Power-up and delivery states 7.1 Power-up state After Power-up, the device is in the following state: ● low power Standby Power mode ● deselected (after Power-up, a falling edge is required on Chip Select (S) before any instructions can be started). ● not in the Hold Condition ● the Write Enable Latch (WEL) is reset to 0 ● Write In Progress (WIP) is reset to 0 The BP1 and BP0 bits of the Status Register are unchanged from the previous power-down (they are non-volatile bits). 7.2 Initial delivery state The device is delivered with the memory array set at all 1s (FFh). The Block Protect (BP1 and BP0) bits are initialized to 0. |
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