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STPCC5HEBC Fiches technique(PDF) 86 Page - STMicroelectronics

No de pièce STPCC5HEBC
Description  X86 Core PC Compatible Information Appliance System-on-Chip
PDF  93 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STPCC5HEBC Fiches technique(HTML) 86 Page - STMicroelectronics

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DESIGN GUIDELINES
86/93
Release 1.5 - January 29, 2002
As the PCB acts as a heat sink, the layout of top
and ground layers must be done with care to
maximize the board surface dissipating the heat.
The only limitation is the risk of losing routing
channels. Figure 6-31 and Figure 6-32 show a
routing with a good thermal dissipation thanks to
an optimized placement of power and signal vias.
The ground plane should be on bottom layer for
the best heat spreading (thicker layer than internal
ones) and dissipation (direct contact with air). .
Figure 6-31. Layout for Good Thermal Dissipation - top layer
1
A
3.3V ball
2.5V ball (Core / PLLs)
Via
STPC ball
GND ball
Not Connected ball



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