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PM8800ATR Fiches technique(PDF) 20 Page - STMicroelectronics |
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PM8800ATR Fiches technique(HTML) 20 Page - STMicroelectronics |
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20 / 35 page ![]() PD interface PM8800A 20/35 In the following picture a typical start sequence that can be observed in real circuits. Figure 11. Typical start up sequence Ch1 = 5 Vout, Ch2 = VSS - GND, Ch3 = Vcc, Ch4 = I input Depending on the application, care must be put on the choice of the inrush current limit to avoid that the voltage drop on the external Ethernet cable will cause UVLO conditions during the charging phase of the bulk capacitor. It is recommended to select this voltage drop (20 Ω max for 100 m of cable x I inrush) to be lower than the UVLO hysteresis ( 7 V) in order to avoid hiccup turn on. 5.5 Continuos current limitation PM8800A provide a default continuos current limitation of 440 mA. This is achieved by leaving the pin DCCDL floating. A different DC current limit can be set by connecting a resistor between DCCL and VSS whose value can be obtained by the following equation: R DC kΩ [] 11200 I DC mA [] ----------------------- = |
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