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PM6670ASTR Fiches technique(PDF) 18 Page - STMicroelectronics |
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PM6670ASTR Fiches technique(HTML) 18 Page - STMicroelectronics |
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18 / 54 page ![]() Block diagram PM6670AS 18/54 6 Block diagram Figure 25. Functional and block diagram VREF VOSC VTTGND VTT LDOIN VTTREF AVCC SGND DDRSEL DSCG VTTSNS VCC MODE S3 S5 CSNS HGATE LGATE PHASE BOOT PGND VSNS COMP CONTROL LOGIC Zero Crossing & Current Limit PG Vr -10 % Vr +10 % + - + - gm + - Vr + _ VREF R R Level shifter 1.236V Bandgap Vr = 0.9V NTD NTD NTD NTD HIZ HIZ BEN BEN TD TD Ton UVLO SWEN SWEN Vr Anti Cross Conduction Ton min Toff min 1-shot 1-shot 1-shot fix adj DDR3 UVP/OVP Thermal Shutdown VREF VOSC VTTGND VTT LDOIN VTTREF AVCC SGND DDRSEL DSCG VTTSNS VCC MODE S3 S5 CSNS HGATE LGATE PHASE BOOT PGND VSNS COMP CONTROL LOGIC Zero Crossing & Current Limit PG Vr -10 % Vr +10 % + - + - gm + - Vr + _ VREF R R Level shifter 1.236V Bandgap Vr = 0.9V NTD NTD NTD NTD HIZ HIZ BEN BEN TD TD Ton UVLO SWEN SWEN Vr Anti Cross Conduction Ton min Toff min 1-shot 1-shot 1-shot fix adj DDR3 UVP/OVP Thermal Shutdown VTTGND VTT LDOIN VTTREF AVCC SGND DDRSEL DSCG VTTSNS VCC MODE S3 S5 CSNS HGATE LGATE PHASE BOOT PGND VSNS COMP CONTROL LOGIC Zero Crossing & Current Limit PG Vr -10 % Vr +10 % + - + - gm + - Vr + _ VREF R R Level shifter 1.236V Bandgap Vr = 0.9V NTD NTD NTD NTD HIZ HIZ BEN BEN TD TD Ton UVLO SWEN SWEN Vr Anti Cross Conduction Ton min Toff min 1-shot 1-shot 1-shot fix adj DDR3 UVP/OVP Thermal Shutdown VCC MODE S3 S5 CSNS HGATE LGATE PHASE BOOT PGND VSNS COMP CONTROL LOGIC Zero Crossing & Current Limit PG Vr -10 % Vr +10 % + - + - gm + - Vr + _ VREF R R Level shifter 1.236V Bandgap Vr = 0.9V NTD NTD NTD NTD HIZ HIZ BEN BEN TD TD Ton UVLO SWEN SWEN Vr Anti Cross Conduction Ton min Toff min 1-shot 1-shot 1-shot fix adj DDR3 UVP/OVP Thermal Shutdown Table 7. Legend SWEN Switching controller enable TD Tracking discharge enable NTD Non-tracking discharge enable BEN VTTREF buffer enable HIZ LDO high impedance mode enable |
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