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L5955 Fiches technique(PDF) 12 Page - STMicroelectronics |
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L5955 Fiches technique(HTML) 12 Page - STMicroelectronics |
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12 / 17 page ![]() Functional description L5955 12/17 Figure 7. Definition of timing on the I2C Bus. Figure 8. Typical application circuit 3.1 Write mode: S = START condition - SDA goes from high to low while SCL is high A = Acknowledge - the device being written to, pulls down on data line (SDA) during the acknowledge clock pulse. P = STOP condition - SDA goes from low to high while SCL is high. tBUP PS P SDA SCL Sr tLOW tR tF tHD;DAT tHD;DAT tSU;DAT tSU;STA tHD;STA tSU;STO D99AU1007 tSP tHIGH STBY1 STBY2 REG1 REG2 REG3 REG4 REG5 REG6 HSD1 HSD2 HSD3 GND PGND TAB1 TAB2 V BAT1 V BAT2 V BAT3_1 V BAT3_2 EN SCL SDA MRSTDLY Cslew 0.1 μF T.B.D. LVW STBY1 MRST LVW_IN 10K V BAT1 T.B.D. T.B.D. 11 17 13 15 9 2 21 7 25 5 23 19 18 20 12 10 24 26 16 22 4 6 8 14 3 1 27 8 x 10 μF Chip address Data byte S 0 A A .. .. P MSB LSB MSB LSB |
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