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EMIF02-MIC02F3 Fiches technique(PDF) 5 Page - STMicroelectronics |
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EMIF02-MIC02F3 Fiches technique(HTML) 5 Page - STMicroelectronics |
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5 / 8 page ![]() EMIF02-MIC02F3 Ordering information scheme 5/8 3 Ordering information scheme Figure 12. Ordering information scheme 4 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 13. Package dimensions EMIF yy - xxx zz Fx EMI Filter Number of lines Information Package x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version F = Flip Chip x = 3: Lead-free, pitch = 400 µm, bump = 255 µm 0.77 mm ± 30 µm 185 µm ± 10 255 µm ± 40 400 µm ± 40 605 µm ± 55 |
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