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EMIF02-MIC01F2 Fiches technique(PDF) 4 Page - STMicroelectronics |
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EMIF02-MIC01F2 Fiches technique(HTML) 4 Page - STMicroelectronics |
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4 / 7 page ![]() Ordering information scheme EMIF02-MIC01F2 4/7 2 Ordering information scheme Figure 7. Ordering information scheme 3 Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 8. Flip Chip dimensions EMIF yy - xx zz Fx EMI Filter Number of lines Information Package x = resistance value (Ohms) z = capacitance value / 10 (pF) or 2 letters = application 2 digits = version F = Flip Chip x = 2: Lead-free, Pitch = 500 µm, Bump = 310 µm |
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