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STLC5432 Fiches technique(PDF) 30 Page - STMicroelectronics

No de pièce STLC5432
Description  2Mbit CEPT & PRIMARY RATE CONTROLLER DEVICE
PDF  46 Pages
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Fabricant  STMICROELECTRONICS [STMicroelectronics]
Site Internet  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STLC5432 Fiches technique(HTML) 30 Page - STMicroelectronics

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Figure 7: DIN/DOUT multiplex during Time Slot 0 - Serial Microprocessor Interface Mode.
11111111
10
A0/5
00
11111111
A0/5
10
A0/5
READ CYCLE
IDLE or WRITE CYCLES
NEW READ CYCLE
125
µs
n x 125
µs
DIN
D0/6
1
10
A0/5
INTERRUPT MESSAGE
250
µs
DOUT
READ CYCLE
250
µs
A0/5
1 0
11111111
IDLE
ALARM
REGISTER
ADDRESS
ALARM
REGISTER
DATA
REGISTER
ADDRESS
REGISTER
DATA
D93TL052A
1
D93TL053A
TSO
D0/6
1
00
TSO
A0/5
125
µs
125
µs
DIN
TSO
A0/5
00
125
µs
AD
A
WRITE CYCLE 250
µs
D0/6
1
D
2nd WRITE CYCLE
11
11
11
11
IDLE
D0
D5
D1
D6
D2
1
D3
D4
D DATA
A0
A5
A1
R
A2
0
A3
A4
A ADDRESS REGISTER
05
16
27
34
BIT NUMBER
THE BITS ARE TRANSMITTED TO MULTIPLEX IN ORDER, BIT 1 FIRST
TWO CONSECUTIVE WRITE CYCLES
R/W
0
STLC5432
30/46



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