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T84C5112-RKSCL Fiches technique(PDF) 34 Page - ATMEL Corporation |
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T84C5112-RKSCL Fiches technique(HTML) 34 Page - ATMEL Corporation |
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34 / 97 page ![]() 34 Rev. B - November 10, 2000 Preliminary T80C5112 Figure 13. Baud Rate selection 11.3.1. Baud Rate selection table for UART 11.3.2. Internal Baud Rate Generator (BRG) When the internal Baud Rate Generator is used, the Baud Rates are determined by the BRG overflow depending on the BRL reload value, the X2 bit in CKON0 register, the value of SPD bit (Speed Mode) in BDRCON register and the value of the SMOD1 bit in PCON register (for UART). : Figure 14. Internal Baud Rate Generator TBCK RBCK Clock Source for UART Tx Clock Source UART Rx 0 0 Timer 1 Timer 1 1 0 INT_BRG Timer 1 0 1 Timer 1 INT_BRG 1 1 INT_BRG INT_BRG / 16 RBCK INT_BRG 0 1 TBCK INT_BRG TIMER1_BRG Rx Clock / 16 0 1 TIMER1_BRG Tx Clock Peripheral clock BRG 0 1 /6 BRL /2 0 1 INT_BRG SPD BRR SMOD1 auto reload counter overßow |
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