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AT89C51ID2-RDTIM Fiches technique(PDF) 69 Page - ATMEL Corporation |
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AT89C51ID2-RDTIM Fiches technique(HTML) 69 Page - ATMEL Corporation |
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69 / 159 page ![]() 69 AT89C51ID2 4289A–8051–09/03 Table 51. IEN1 Register IEN1 - Interrupt Enable Register (B1h) Reset Value = XXXX X000b Bit addressable 7654 3210 ---- - ESPI ETWI EKBD Bit Number Bit Mnemonic Description 7- Reserved 6- Reserved 5- Reserved 4- Reserved 3- Reserved 2 ESPI SPI interrupt Enable bit Cleared to disable SPI interrupt. Set to enable SPI interrupt. 1ETWI TWI interrupt Enable bit Cleared to disable TWI interrupt. Set to enable TWI interrupt. 0EKBD Keyboard interrupt Enable bit Cleared to disable keyboard interrupt. Set to enable keyboard interrupt. |
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