ST6391 datasheet(44/68 Pages) STMICROELECTRONICS

No de pièce	ST6391

Description	8-BIT HCMOS MCUs FOR TV FREQUENCY SYNTHESIS WITH OSD

PDF	68 Pages

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Fabricant	STMICROELECTRONICS [STMicroelectronics]

Site Internet	http://www.st.com

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44 / 68 page

SERIAL PERIPHERAL INTERFACE (Continued)

Figure 49.Sofware Bus (Hardware Bus Disabled) Timing Diagram

STD SPI Protocol (Shift Register)

This protocol is similar to the I

2CBUS with the ex-

ception that there is no acknowledge pulse and

there are no stop or start bits. The clock cannot be

slowed down by the external peripherals.

In this case all three outputs should be high in or-

der not to lock the software I/Os from functioning.

SPI Standard Bus Protocol: The standard bus

protocol is selected by loading the SPI Control

2C must

be set at one and bit 1 named STD mut be reset.

When the standard bus protocol is selected bit 2 of

the SCR1 is meaningless.

This bit named STOP bit is used only in I

2CBUS or

SBUS. However take care thet THE STOP BIT

MUST BE RESET WHEN THE STANDARD PRO-

TOCOL IS USED. This bit is set to ZERO after RE-

SET.

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