ST63142 datasheet(59/86 Pages) STMICROELECTRONICS

59 / 86 page

Instruction Set

The ST631xx Core has a set of 40 basic instruc-

tions. When these instructions are combined with

nine addressing modes, 244 usable opcodes can

be obtained. They can be divided into six different

types:load/store, arithmetic/logic, conditional

branch, control instructions, jump/call, bit manipu-

lation. The following paragraphs describe the dif-

ferent types.

All the instructions within a given type are pre-

sented in individual tables.

Load & Store. These instructions use one,two or

three bytes in relation with the addressing mode.

One operand is the Accumulator for LOAD and the

other operand is obtained from data memory using

one of the addressing modes.

For Load Immediate one operand can be any of the

256 data space bytes while the other is always

immediate data. See Table 13.

Instruction

Addressing Mode

Bytes

Cycles

Flags

LD A, X

Short Direct

∆

LD A, Y

Short Direct

∆

LD A, V

Short Direct

∆

LD A, W

Short Direct

∆

LD X, A

Short Direct

∆

LD Y, A

Short Direct

∆

LD V, A

Short Direct

∆

LD W, A

Short Direct

∆

LD A, rr

Direct

∆

LD rr, A

Direct

∆

LD A, (X)

Indirect

∆

LD A, (Y)

Indirect

∆

LD (X), A

Indirect

∆

LD (Y), A

Indirect

∆

LDI A, #N

Immediate

∆

LDI rr, #N

Immediate

Notes:

X,Y. Indirect Register Pointers, V & W Short Direct Registers

# . Immediate data (stored in ROM memory)

rr.

Data space register

∆ . Affected

* . Not Affected

Table 13. Load & Store Instructions

SOFTWARE DESCRIPTION (Continued)

ST63140,142,126,156

55/82

ST63142 Fiches technique(PDF) 59 Page - STMicroelectronics

ST63142 Fiches technique(HTML) 59 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86

Fiches technique Télécharger

Lien URL