AI01748

Switch Back to

Transmit-Only Mode

Memory Power On

Internal Address Pointer = 0

VCLK

YES

NO

NO

Send Data bit (MSB first) pointed

by the Address Pointer and

auto-increment pointed bit/byte

SCL

YES

NO

SDA Hi-Z

VCLK Internal Counter = 0

Start Internal 2 sec Timer

SCL

YES

Reset VCLK Internal Counter

and Reset Internal Timer

Valid

(START + Device Select)

?

YES

VCLK

YES

Increment VCLK Counter

Counter = 128

or Timer > 2 sec

YES

waiting for a Device Select byte

Reset Counter and Timer

Send Acknowledge

Respond to the Incoming

Transition

State

(VESA 2)

Transmit-Only Mode

(DDC1)

(DDC2B)

NO

NO

Figure 5. Error Recovery Mechanism Flowchart for the ST24FC21, ST24FC21B and ST24FW21

products

6/22

ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21