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74LVC1G02GS Fiches technique(PDF) 3 Page - Nexperia B.V. All rights reserved |
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74LVC1G02GS Fiches technique(HTML) 3 Page - Nexperia B.V. All rights reserved |
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3 / 19 page ![]() 74LVC1G02 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 12 — 29 November 2016 3 of 19 NXP Semiconductors 74LVC1G02 Single 2-input NOR gate 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 4. Pin configuration SOT353-1 and SOT753 Fig 5. Pin configuration SOT886 Fig 6. Pin configuration SOT891, SOT1115 and SOT1202 Fig 7. Pin configuration SOT1226 (X2SON5) Table 3. Pin description Symbol Pin Description TSSOP5 and X2SON5 XSON6 B 1 1 data input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected VCC 5 6 supply voltage |
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