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ADATE320 Fiches technique(PDF) 17 Page - Analog Devices

No de pièce ADATE320
Description  1.25 GHz Dual Integrated DCL with PPMU, Level Setting DACs, and On-Chip Calibration Registers
PDF  78 Pages
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Fabricant  AD [Analog Devices]
Site Internet  http://www.analog.com
Logo AD - Analog Devices

ADATE320 Fiches technique(HTML) 17 Page - Analog Devices

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Data Sheet
ADATE320
SPECIFICATIONS
analog.com
Rev. C | 17 of 78
Table 7.
Parameter
Min
Typ
Max
Unit
Test Level
Test Conditions/Comments
Current Droop
Low Current Clamp (PCLx), Sink
−2
+2
%FSR
P
PCLx = 0.5 V (−80% FS), PCHx = 4.5 V (80% FS),
PPMU force −0.5 V and +3.5 V into VDUTx = 4.5 V,
measure ∆I at the DUTx pin in Range A
High Current Clamp (PCHx),
Source
−2
+2
%FSR
P
PCLx = 0.5 V (−80% FS), PCHx = 4.5 V (80% FS),
PPMU force −0.5 V and +3.5 V into VDUTx = −1.5 V,
measure ∆I at the DUTx pin in Range A
SETTLING/SWITCHING TIMES
FV Settling Time to 0.1% of Final
Value
Range A, 200 pF and 2000 pF
Load
20
µs
S
PPMU enabled in FV, Range A, step from 0.0 V to 4.0 V
Range B, 200 pF and 2000 pF
Load
25
µs
S
PPMU enabled in FV, Range B, DCL disabled, step from
0.0 V to 4.0 V
Range C, 200 pF Load
25
µs
S
PPMU enabled in FV, Range C, DCL disabled, step from
0.0 V to 4.0 V
Range C, 2000 pF Load
65
µs
S
PPMU enabled in FV, Range C, DCL disabled, step from
0.0 V to 4.0 V
FV Settling Time to 1.0% of Final
Value
Range A, 200 pF and 2000 pF
Load
16
µs
CB
PPMU enabled in FV, Range A, DCL disabled, step from
0.0 V to 4.0 V
Range B, 200 pF and 2000 pF
Load
14
µs
CB
PPMU enabled in FV, Range B, DCL disabled, step from
0.0 V to 4.0 V
Range C, 200 pF and 2000 pF
Load
18
µs
CB
PPMU enabled in FV, Range C, DCL disabled enabled,
step from 0.0 V to 4.0 V
FI Settling Time to 0.1% of Final
Value
Range A, 200 pF in Parallel with
120 Ω
16
µs
S
PPMU enabled in FI, Range A, DCL disabled, step from
0.0 mA to 40 mA
Range B, 200 pF in Parallel with
1.5 kΩ
10
µs
S
PPMU enabled in FI, Range B, DCL disabled, step from
0.0 mA to 1 mA
Range C, 200 pF in Parallel with
15.0 kΩ
40
µs
S
PPMU enabled in FI, Range C, DCL disabled, step from
0.0 mA to 100 µA
FI Settling Time to 1.0% of Final
Value
Range A, 200 pF in Parallel with
120 Ω
8
µs
CB
PPMU enabled in FI, Range A, DCL disabled, step from
0.0 mA to 40 mA
Range B, 200 pF in Parallel with
1.5 kΩ
8
µs
CB
PPMU enabled in FI, Range B, DCL disabled, step from
0.0 mA to 1 mA
Range C, 200 pF in Parallel with
15.0 kΩ
8
µs
CB
PMU enabled in FI, Range C, DCL disabled, step from
0.0 mA to 100 µA
INTERACTION AND CROSSTALK
Measure Voltage Channel to Channel
Crosstalk
10
µV
CT
PPMU enabled in FIMV, Range B, channel under test:
force 0.0 mA into 0.0 V; other channel: force 0.0 mA into
VDUTx; sweep VDUTx from −1.5 V to +4.5 V; measure ∆V
at PPMU_Mx under test
Measure Current Channel to Channel
Crosstalk
0.0001
%FSR
CT
PPMU enabled in FVMI, Range B; channel under test:
force 0.0 V into open circuit; other channel: force 0.0
V into IDUTx; sweep IDUTx from −1.0 mA to +1.0 mA;
measure ∆V at PPMU_Mx under test



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