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74HC30PW Fiches technique(PDF) 8 Page - Nexperia B.V. All rights reserved |
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74HC30PW Fiches technique(HTML) 8 Page - Nexperia B.V. All rights reserved |
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8 / 15 page ![]() 74HC_HCT30 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 7 — 2 December 2015 8 of 15 NXP Semiconductors 74HC30; 74HCT30 8-input NAND gate Test data is given in Table 9. Definitions for test circuit: RT = termination resistance should be equal to the output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig 6. Test circuit for measuring switching times Table 9. Test data Type Input Load Test VI tr, tf CL 74HC30 VCC 6.0 ns 15 pF, 50 pF tPLH, tPHL 74HCT30 3.0 V 6.0 ns 15 pF, 50 pF tPLH, tPHL |
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