AS5130ATST datasheet(25/41 Pages) AMSCO

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AS5130

Data Sheet - D e ta i l e d D e s c r i p t i o n

Figure 18. External Circuitry for Polling Mode

The voltage at pin 16 (DVDD) determines whether polling mode is activated or not. Any voltage above 3.6V activates

the polling functionality. This voltage must always be present at DVDD in order to hold the information in the registers.

The procedure is as follows:

1. Initial startup: The circuit starts up with invalid trim values, which are read back from the storage registers; the

command rst_otp (command 19 – 10011) must be sent to read out valid trim values from the OTP.

2. These values are copied to the storage registers if OTP<8> (Wake enable) is set (must be set for polling

mode).

3. The values of AGC counter, actual angle, multi turn counter, hysteresis setting, wake threshold and gain set-

ting are continuously updated in the storage registers.

4. The actual angle is stored as a reference by sending command STORE REF (command 3 – 00011). without

this reference angle, a WAKE is generated at every startup.

5. The update of the storage registers is stopped if VDD drops below 4.45V and then the information is stored

(DVDD) at the next startup (VDD on), the values are read back from the storage registers and the measured

angle is compared with the stored reference angle; if the difference between both exceeds the threshold, a

WAKE pulse is generated.

DVDD

WAKE

t_on

t_off

t_wakeup

100n

+5V

>1.5K

VDD

VSS

AS5130ATST Fiches technique(PDF) 25 Page - ams AG