VIPER31 datasheet(16/39 Pages) STMICROELECTRONICS

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Figure 26. Soft startup

Soft start phase

Steady state

time

IDLIM

tSS

IDRAIN

VOUT

time

VCOMP

VCOMPH

VOUT

4.6

Oscillator

The IC embeds a fixed frequency oscillator with jittering feature. The switching frequency is modulated by

approximately ±7%·FOSC at 200 Hz rate. The purpose of the jittering is to get a spread-spectrum action that

distributes the energy of each harmonic of the switching frequency over a number of frequency bands, having the

same energy on the whole but smaller amplitudes. This helps to reduce the conducted emissions, especially

when measured with the average detection method or, which is the same, to pass the EMI tests with an input filter

of smaller size with respect to the one that should be needed in absence of jittering feature. Three switching

frequency options, FOSC, are available: 30 kHz (X type), 60 kHz (L type) and 132 kHz (H type).

4.7

Pulse skipping

The IC embeds a pulse skip circuit that operates in the following way:

•

Each time the DRAIN peak current exceeds IDLIM level within tON_MIN, the next switching cycle is skipped.

The cycles can be skipped until the minimum switching frequency FOSC_MIN (15 kHz) is reached.

•

Each time the DRAIN peak current does not exceed IDLIM within tON_MIN, the next switching cycle is

restored. The cycles can be restored until the nominal switching frequency FOSC is reached.

The protection is intended in order to avoid the so called “flux runaway” condition often present at converter

startup and due to the fact that the primary MOSFET, which is turned on by the internal oscillator, cannot be

turned off before the minimum on-time.

During the on-time, the inductor is charged through the input voltage and, if it cannot be discharged by the same

amount during the off-time, in every switching cycle there is a net increase of the average inductor current, that

can reach dangerously high values until the output capacitor is not charged enough to ensure the inductor

discharge rate needed for the volt-second balance. This condition is common at converter startup, because of the

low output voltage.

In the following Figure 27. Pulse skipping during startup the effect of pulse skipping feature on the DRAIN peak

current shape is shown (solid line), compared with the DRAIN peak current shape when pulse skipping feature is

not implemented (dashed line). Providing more time for cycle-by-cycle inductor discharge when needed, this

feature is effective in keeping low the maximum DRAIN peak current avoiding the flux runaway condition.

VIPER31

General description

DS13285 - Rev 6

page 16/39

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