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AS3715 Fiches technique(PDF) 140 Page - ams-OSRAM AG |
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AS3715 Fiches technique(HTML) 140 Page - ams-OSRAM AG |
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140 / 159 page ![]() ams Datasheet Page 139 [v1-03] 2015-Aug-10 Document Feedback AS3715 − Register Description Figure 173: ASIC_ID2 Figure 174: SpareRegister1 Figure 175: Fuse7 Note(s) and/or Footnote(s): 1. RegX_gpio_sel can shorten time or use GPIO1 or GPIO2 as timer. Addr:91h ASIC_ID2 Bit Bit Name Default Access Bit Description 3:0 revision b0011 RO For chips marked 2v2 (metal fuse!!!) Addr:9bh SpareRegister1 Bit Bit Name Default Access Bit Description 7:0 sparereg1 0 RW_SM Addr:a7h Fuse7 Bit Bit Name Default Access Bit Description 7del_time b0 RW Start sequence: Time to wait between turning ON RegX and RegX+1.(1) 0 : 1 or 4 ms 1 : 4 or 12 ms 6 unique_id b0 RW 0 : Disable unique ID 1 : Enable unique ID: Fuse26..31 are used for UID and not for startup 5sequ_on b0 RW Start sequence 0 : Regulators are OFF after startup 1 : Turn ON regulators (see Fuse12 .. Fuse31) 4:3 tksel b00 RW 2 sdmph_clk_div_0 b0 RW 1:0 chg_eoc_v b00 RW |
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