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M54HC75 Fiches technique(PDF) 2 Page - STMicroelectronics |
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M54HC75 Fiches technique(HTML) 2 Page - STMicroelectronics |
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2 / 9 page ![]() TRUTH TABLE INPUTS OUTPUTS FUNCTION D GQQ LH L H HH H L X L Qn Qn LATCH PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1, 14, 11, 8 1Q to 4Q Complementary Latch Outputs 2, 3, 6, 7 1D to 4D Data Inputs 4G3 • 4 Latch Enable Input, latches 3 and 4 13 G1 • 2 Latch Enable Input, latches 1 and 2 16, 15, 10, 9 1Q to 4Q Latch Outputs 12 GND Ground (0V) 5VCC Positive Supply Voltage IEC LOGIC SYMBOL SCHEMATIC CIRCUIT ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Source Sink Current Per Output Pin ± 25 mA ICC or IGND DC VCC or Ground Current ± 50 mA PD Power Dissipation 500 (*) mW Tstg Storage Temperature -65 to +150 oC TL Lead Temperature (10 sec) 300 oC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. (*) 500 mW: ≅ 65 oC derate to 300 mW by 10mW/oC: 65 oCto 85 oC M54/M74HC75 2/9 |
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