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M95M01-RMN6TP Fiches technique(PDF) 23 Page - STMicroelectronics |
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M95M01-RMN6TP Fiches technique(HTML) 23 Page - STMicroelectronics |
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23 / 40 page ![]() M95M01-R Instructions 23/40 Regardless of the order of the two events, the Hardware Protected Mode (HPM) can be entered: ● by setting the Status Register Write Disable (SRWD) bit after driving Write Protect (W) Low ● or by driving Write Protect (W) Low after setting the Status Register Write Disable (SRWD) bit. The only way to exit the Hardware Protected Mode (HPM) once entered is to pull Write Protect (W) High. If Write Protect (W) is permanently tied High, the Hardware Protected Mode (HPM) can never be activated, and only the Software Protected Mode (SPM), using the Block Protect (BP1, BP0) bits of the Status Register, can be used. |
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