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M50LPW040K1T Fiches technique(PDF) 21 Page - STMicroelectronics |
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M50LPW040K1T Fiches technique(HTML) 21 Page - STMicroelectronics |
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21 / 36 page ![]() 21/36 M50LPW040 Table 21. LPC Interface Clock Characteristics (TA = 0 to 70°C or –20 to 85°C; VCC = 3.0 to 3.6V) Note: 1. Devices on the PCI Bus must work with any clock frequency between DC and 33MHz. Below 16MHz devices may be guaranteed by design rather than tested. Refer to PCI Specification. Symbol Parameter Test Condition Value Unit tCYC CLK Cycle Time(1) Min 30 ns tHIGH CLK High Time Min 11 ns tLOW CLK Low Time Min 11 ns CLK Slew Rate peak to peak Min 1 V/ns Max 4 V/ns Figure 9. LPC Interface Clock Waveform AI03403 tHIGH tLOW 0.6 VCC tCYC 0.5 VCC 0.4 VCC 0.3 VCC 0.2 VCC 0.4 VCC, p-to-p (minimum) |
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