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M50FW080N5TP Fiches technique(PDF) 31 Page - STMicroelectronics |
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M50FW080N5TP Fiches technique(HTML) 31 Page - STMicroelectronics |
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31 / 56 page ![]() M50FW080 Status Register 31/55 Table 10. Status Register bits Operation Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Program active ‘0’ X(1) 1. For Program operations during Erase Suspend Bit 6 is ‘1’, otherwise Bit 6 is ‘0’. ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Program suspended ‘1 X(1) ‘0’ ‘0’ ‘0’ ‘1’ ‘0’ Program completed successfully ‘1’ X(1) ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Program failure due to VPP Error ‘1’ X(1) ‘0’ ‘0’ ‘1’ ‘0’ ‘0’ Program failure due to Block Protection (FWH Interface only) ‘1’ X(1) ‘0’ ‘0’ ‘0’ ‘0’ ‘1’ Program failure due to cell failure ‘1’ X(1) ‘0’ ‘1’ ‘0’ ‘0’ ‘0’ Erase active ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Block Erase suspended ‘1’ ‘1’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Erase completed successfully ‘1’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ Erase failure due to VPP Error ‘1’ ‘0’ ‘0’ ‘0’ ‘1’ ‘0’ ‘0’ Block Erase failure due to Block Protection (FWH Interface only) ‘1’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘1’ Erase failure due to failed cell(s) ‘1’ ‘0’ ‘1’ ‘0’ ‘0’ ‘0’ ‘0’ |
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