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RP112K141D Fiches technique(PDF) 3 Page - Nisshinbo Micro Devices Inc. |
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RP112K141D Fiches technique(HTML) 3 Page - Nisshinbo Micro Devices Inc. |
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3 / 35 page ![]() RP112x No. EA-258-250325 3 PIN DESCRIPTIONS Top View 2 1 3 4 Bottom View 1 2 4 3 (1) 1 5 4 1 1 3 2 (mark side) 1 2 3 4 5 (mark side) DFN(PL)1010-4 Pin Configuration SC-88A Pin Configuration SOT-23-5 Pin Configuration DFN(PL)1010-4 Pin Description Pin No. Symbol Description 1 VOUT Output Pin 2 GND Ground Pin 3 CE Chip Enable Pin ("H" Active) 4 VDD Input Pin SC-88A Pin Description Pin No Symbol Pin Description 1 VDD Input Pin 2 GND Ground Pin 3 CE Chip Enable Pin ("H" Active) 4 NC No Connection 5 VOUT Output Pin SOT-23-5 Pin Description Pin No Symbol Pin Description 1 VDD Input Pin 2 GND Ground Pin 3 CE Chip Enable Pin ("H" Active) 4 NC No Connection 5 VOUT Output Pin (1) Tab is GND level (They are connected to the reverse side of this IC). The tab is better to be connected to the GND, but leaving it open is also acceptable. |
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