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Moteur de recherche de fiches techniques de composants électroniques |
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Moteur de recherche de fiches techniques de composants électroniques |
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STM32F101T6U6ATR Fiches technique(PDF) 32 Page - STMicroelectronics |
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STM32F101T6U6ATR Fiches technique(HTML) 32 Page - STMicroelectronics |
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32 / 87 page  Electrical characteristics STM32F101x4, STM32F101x6 32/87 DocID15058 Rev 6 5.3.2 Operating conditions at power-up / power-down Subject to general operating conditions for TA. 5.3.3 Embedded reset and power control block characteristics The parameters given in Table 10 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. PD Power dissipation at TA = 85 °C(3) LQFP64 - 444 mW LQFP48 - 363 VFQFPN36 - 1000 TA Ambient temperature Maximum power dissipation –40 85 °C Low power dissipation(4) –40 105 TJ Junction temperature range - –40 105 1. When the ADC is used, refer to Table 41: ADC characteristics. 2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and operation. 3. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Table 6.5: Thermal characteristics on page 82). 4. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Table 6.5: Thermal characteristics on page 82). Table 8. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Table 9. Operating conditions at power-up / power-down Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate - 0 ∞ µs/V VDD fall time rate 20 ∞ |
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