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AT45DB321E Fiches technique(PDF) 60 Page - Renesas Technology Corp |
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AT45DB321E Fiches technique(HTML) 60 Page - Renesas Technology Corp |
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60 / 80 page ![]() DS-AT45DB321E-8784 Rev. N Page 60 9/1/23 © 2023 Renesas Electronics AT45DB321E Datasheet 18.4 AC Characteristics 1. Values are based on device characterization, not 100% tested in production. Symbol Parameter Min Max Units fSCK SCK Frequency 70 MHz fCAR1 SCK Frequency for Continuous Read (0x0B) 85 MHz fCAR2 SCK Frequency for Continuous Read (0x03) (Low Frequency) 50 MHz fCAR3 SCK Frequency for Continuous Read (Low Power Mode – 01h Opcode) 15 MHz fCAR4 SCK Frequency for Continuous Read (0x1B) 104 MHz tWH SCK High Time 4 ns tWL SCK Low Time 4 ns tSCKR[1] SCK Rise Time, Peak-to-peak 0.1 V/ns tSCKF[1] SCK Fall Time, Peak-to-peak 0.1 V/ns tCS Minimum CS High Time 20 ns tCSS CS Setup Time 5 ns tCSH CS Hold Time 5ns tSU Data In Setup Time 2 ns tH Data In Hold Time 1 ns tHO Output Hold Time 0 ns tDIS[1] Output Disable Time 6ns tV Output Valid 7ns tWPE WP Low to Protection Enabled 1 µs tWPD WP High to Protection Disabled 1 µs tLOCK Freeze Sector Lockdown Time (from CS High) 100 µs tEUDPD[1] CS High to Ultra-Deep Power-Down 4 µs tCSLU Minimum CS Low Time to Exit Ultra-Deep Power-Down 20 ns tXUDPD Exit Ultra-Deep Power-Down Time 180 µs tEDPD[1] CS High to Deep Power-Down 2 µs tRDPD Resume from Deep Power-Down Time 35 µs tXFR Page to Buffer Transfer Time 200 µs tCOMP Page to Buffer Compare Time 200 µs tRST RESET Pulse Width 10 µs tREC RESET Recovery Time 1µs tSWRST Software Reset Time 35 µs |
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