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STF4NK50ZD Fiches technique(PDF) 5 Page - STMicroelectronics |
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STF4NK50ZD Fiches technique(HTML) 5 Page - STMicroelectronics |
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5 / 17 page ![]() STD4NK50ZD - STD4NK50ZD-1 - STF4NK50ZD - STP4NK50ZD Electrical characteristics 5/17 Table 7. Source drain diode Symbol Parameter Test condictions Min Typ. Max Unit ISD Source-drain current 3 A ISDM (1) 1. Pulse width limited by safe operating area Source-drain current (pulsed) 12 A VSD (2) 2. Pulsed: pulse duration=300µs, duty cycle 1.5% Forward on voltage ISD = 3A, VGS=0 1.6 V trr Qrr IRRM Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 3A, di/dt = 100A/µs, VDD = 34V, Tj = 25°C 73 140 3.82 ns nC A trr Qrr IRRM Reverse recovery time Reverse Recovery Charge Reverse recovery current ISD = 3A, di/dt = 100A/µs, VDD = 34V, Tj = 150°C 118 260 4.4 ns nC A Table 8. Gate-source zener diode Symbol Parameter Test condictions Min. Typ. Max Unit BVGSO (1) 1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Gate-source braekdown voltage IGS = ±1mA (open drain) 30 V |
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