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IS25LP02GJ-RHLA3 Fiches technique(PDF) 138 Page - Integrated Silicon Solution, Inc

No de pièce IS25LP02GJ-RHLA3
Description  SERIAL FLASH MEMORY 166MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE
PDF  182 Pages
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Fabricant  ISSI [Integrated Silicon Solution, Inc]
Site Internet  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS25LP02GJ-RHLA3 Fiches technique(HTML) 138 Page - Integrated Silicon Solution, Inc

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IS25LP02GJ
IS25WP02GJ
Integrated Silicon Solution, Inc.- www.issi.com
138
Rev.A
10/02/2025
Figure 8.95 FRQDTR Sequence In QPI Mode (EDh [EXTADD=0], 3-byte address)
Instruction
= EDh
CE #
SCK
3-byte Address
0
1
2
3
4
5
6
7
8
9
10
11
12
Mode 3
Mode 0
tV
20 16 12
5 1
21 17 13
4 0
IO0
IO1
22 18 14
23 19 15
8 4 0
9 5 1
10 6 2
11 7 3
6 Dummy Cycles
IO2
IO3
6 2
7 3
5 1
4 0
6 2
7 3
Data
Out
Data
Out
5 1
4 0
6 2
7 3
Mode Bits
...
4
0
5
1
6
2
7
3
...
...
...
...
Notes:
1. If the mode bits=AXh (where X is don’t care), it can execute the AX read mode (without command). When the mode
bits are different from AXh, the device exits the AX read operation.
2. Number of dummy cycles depends on clock speed. Detailed information in Table 6.11 Read Dummy Cycles.
3. Sufficient dummy cycles are required to avoid I/O contention. If the number of dummy cycles and AX bits cycles
are same, then X should be Hi-Z.



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