EVAL-ADE7569F16EBZ datasheet(29/144 Pages) AD

No de pièce	EVAL-ADE7569F16EBZ

Description	Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver

PDF	144 Pages

Scroll/Zoom	100%

Fabricant	AD [Analog Devices]

Site Internet	http://www.analog.com

Logo

29 / 144 page

ADE7566/ADE7569/ADE7166/ADE7169

Rev. A | Page 29 of 144

The Power Management Interrupt Enable SFR (IPSME, 0xEC)

controls the events that result in a PSM interrupt (see

POWER SUPPLY MONITOR INTERRUPT (PSM)

Table 20).

The power supply monitor interrupt (PSM) alerts the 8052 core

of power supply events. The PSM interrupt is disabled by default.

Setting the EPSM bit in the Interrupt Enable and Priority 2 SFR

(IEIP2, 0xA9) enables the PSM interrupt (see

Figure 32 is a diagram illustrating how the PSM interrupt vector

is shared among the PSM interrupt sources. The PSM interrupt

flags are latched and must be cleared by writing to the IPSMF flag

Table 70).

Table 17).

EPSR

FPSR

ESAG

FSAG

EVADC

FVADC

EBAT

FBAT

EBSO

FBSO

EVDCIN

FVDCIN

FPSM

EPSM

TRUE?

PENDING PSM

INTERRUPT

EPSR

RESERVED

ESAG

RESERVED

EVADC

EBAT

EBSO

EVDCIN

FPSR

FPSM

FSAG

RESERVED

FVADC

FBAT

FBSO

FVDCIN

RESERVED

PTI

RESERVED

PSI

EADE

ETI

EPSM

ESI

IPSME ADDR. 0xEC

IPSMF ADDR. 0xF8

IEIP2 ADDR. 0xA9

NOT INVOLVED IN PSM INTERRUPT SIGNAL CHAIN

Figure 32. PSM Interrupt Sources

EVAL-ADE7569F16EBZ Fiches technique(PDF) 29 Page - Analog Devices

EVAL-ADE7569F16EBZ Fiches technique(HTML) 29 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Fiches technique Télécharger

Lien URL