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DP83867CS Fiches technique(PDF) 112 Page - Texas Instruments |
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DP83867CS Fiches technique(HTML) 112 Page - Texas Instruments |
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112 / 129 page ![]() VDD1P0 VDDIO GND (Die Attach Pad) VDDIO 10 PF 10 nF VDDIO 10 PF 10 nF VDDA2P5 VDDA2P5 10 PF 10 nF VDDA1P8 10 PF 10 nF VDDA1P8 VDDIO Supply 2.5V Supply 1.8V Supply 1.0V Supply 1 PF 1 PF 1 PF 1 PF 1 PF 1 PF 1 PF 1 PF 1 PF 1 PF 1 PF VDD1P0 VDD1P0 VDD1P0 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF 0.1 PF A. Place 1µF and 0.1µF decoupling capacitors as close as possible to component VDD pins, placing the 0.1µF capacitor closest to the pin. B. Note: VDDIO can be 3.3V or 2.5V or 1.8V. Figure 8-8. Three-Supply Configuration DP83867CS, DP83867IS, DP83867E SNLS504F – OCTOBER 2015 – REVISED JANUARY 2025 www.ti.com 112 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: DP83867CS DP83867IS DP83867E |
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