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L9924TR Fiches technique(PDF) 29 Page - STMicroelectronics |
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L9924TR Fiches technique(HTML) 29 Page - STMicroelectronics |
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29 / 85 page ![]() DocID029638 Rev 2 29/85 L9924 Electrical specifications 84 5.3.9 Pin "GATE" The external power MOS provides a PWM regulated current to flow from the system battery into the field coil for system voltage regulation. The GATE pin provides the necessary current to turn-on and turn-off the external power MOS. The gate-source-voltage of the external power MOS is limited by the driver circuit. In order to drive different kinds of external power MOS and to adjust the gate currents according to environmental changes (e.g. temperature, emission levels, excitation signal edges duration) the gate charging and discharging currents are programmable via SPI, register 0x03 [13.4.12]. When the voltage between DRAIN an SOURCE pins become greater than VSCdx the device switches the external power MOS off, activating a fast gate discharging current. Table 19. Electrical characteristics pin "GATE" # Symbol Parameter Test condition Min. Typ. Max. Unit Drivers for external high/low side power MOS 1IGHx(on) Turn on current (SOURCE stage) Tj = 25 °C - 0 -> -11.55, -1.65 steps -mA 1IGHx(off) Turn off current (SINK stage) Tj = 25 °C 0 -> +11.55, +1.65 steps -mA 9VGHxH High level voltage V(A+/B+) = 6 V V(SOURCE) +7V -- V V(A+/B+) = 12 V V(SOURCE) +9 V(SOURCE) +11 VSOURCE +13 V V(A+/B+) = 24 V V(SOURCE) +9 V(SOURCE) +11 VSOURCE +13 V 10 RGSHx Gate-source passive discharge resistance -- 100 - kΩ |
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