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LPV511 Fiches technique(PDF) 6 Page - Texas Instruments |
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LPV511 Fiches technique(HTML) 6 Page - Texas Instruments |
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6 / 26 page ![]() 6 LPV511 SNOSAG7D – AUGUST 2005 – REVISED AUGUST 2016 www.ti.com Product Folder Links: LPV511 Submit Documentation Feedback Copyright © 2005–2016, Texas Instruments Incorporated Electrical Characteristics: 3 V (continued) Unless otherwise specified, all limits are specified for TJ = 25°C, V + = 3 V, V− = 0 V, V CM = VO = V +/2, and R L = 100 kΩ to V +/2.(1) PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT GBW Gain bandwidth product RL = 1 MΩ, CL= 50 pF 27 kHz Phase margin RL = 1 MΩ, CL= 50 pF 53 º en Input-referred voltage noise f = 100 Hz 320 nV/ √Hz in Input-referred current noise f = 10 Hz 0.02 pA/ √Hz f = 1 kHz 0.01 (1) Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. (2) Limits are 100% production tested at 25°C. Limits over the operating temperature range are specified through correlations using the Statistical Quality Control (SQC) method. (3) Typical values represent the most likely parametric norm at the time of characterization. (4) Offset voltage drift is specified by design and/or characterization and is not tested in production. Offset voltage drift is determined by dividing the change in VOS at temperature extremes into the total temperature change. (5) Positive current corresponds to current flowing into the device. 6.6 Electrical Characteristics: 5 V Unless otherwise specified, all limits are specified for TJ = 25°C, V + = 5 V, V− = 0 V, V CM = VO = V +/2, and R L = 100 kΩ to V +/2.(1) PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT VOS Input offset voltage TJ = 25°C ±0.2 ±3 mV TJ = –40°C to 85°C ±3.8 TC VOS Input offset voltage drift(4) TJ = 25°C ±0.3 µV/°C TJ = –40°C to 85°C ±15 IB Input bias current(5) VCM = 0.5 V TJ = 25°C –1000 –320 pA TJ = –40°C to 85°C –1600 VCM = 4.5 V TJ = 25°C 110 800 TJ = –40°C to 85°C 1900 IOS Input offset current ±10 pA CMRR Common mode rejection ratio VCM Stepped from 0 V to 2.5 V TJ = 25°C 80 115 dB TJ = –40°C to 85°C 73 VCM Stepped from 4.4 to 5 V TJ = 25°C 75 107 TJ = –40°C to 85°C 68 VCM Stepped from 0.5 to 4.5 V TJ = 25°C 65 87 TJ = –40°C to 85°C 62 PSRR Power supply rejection ratio V+ = 2.7 V to 5 V, VCM = 0.5 V TJ = 25°C 72 114 dB TJ = –40°C to 85°C 68 V+ = 3 V to 5 V, VCM = 0.5 V TJ = 25°C 76 115 TJ = –40°C to 85°C 72 V+ = 5 V to 12 V, VCM = 0.5 V TJ = 25°C 84 117 TJ = –40°C to 85°C 80 CMVR Input common-mode voltage CMRR ≥ 50 dB TJ = 25°C —0.1 5.1 V TJ = –40°C to 85°C 0 5 AVOL Large signal voltage gain Sinking, VO = 4.5 V TJ = 25°C 78 110 dB TJ = –40°C to 85°C 73 Sourcing, VO = 0.5 V TJ = 25°C 78 110 TJ = –40°C to 85°C 73 |
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