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74V1T03 Fiches technique(PDF) 1 Page - STMicroelectronics |
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74V1T03 Fiches technique(HTML) 1 Page - STMicroelectronics |
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1 / 7 page ![]() 74V1T03 SINGLE 2-INPUT OPEN DRAIN NAND GATE PRELIMINARY DATA ® September 1999 s HIGH SPEED: tPD = 7 ns (TYP.) at VCC =5V s LOW POWER DISSIPATION: ICC =1 µA (MAX.) at TA =25 oC s COMPATIBLE WITH TTL OUTPUTS: VIH =2V (MIN), VIL = 0.8V (MAX) s POWER DOWN PROTECTION ON INPUTS s OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V s IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74V1T03 is an advanced high-speed CMOS SINGLE 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. This device can, with an external pull-up resistor, be used in wired AND configuration. This device can also be used as a led driver in any other application requiring a current sink. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODE: 74V1T03S 74V1T03C S (SOT23-5L) C (SC-70) 1/7 |
Numéro de pièce similaire - 74V1T03 |
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Description similaire - 74V1T03 |
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