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CDCLVD2102 Fiches technique(PDF) 2 Page - Texas Instruments

No de pièce CDCLVD2102
Description  Dual 1:2 Low Additive Jitter LVDS Buffer
PDF  22 Pages
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Fabricant  TI2 [Texas Instruments]
Site Internet  https://www.ti.com
Logo TI2 - Texas Instruments

CDCLVD2102 Fiches technique(HTML) 2 Page - Texas Instruments

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Reference
Generator
LVDS
INN0
INP0
INN1
INP1
EN
GND
OUTN [0..1]
OUTP [0..1]
VCC
200 kW
LVDS
OUTN [2..3]
OUTP [2..3]
VAC_REF
VCC
200 kW
3mm x 3mm
16 pin QFN (RGT)
Thermal Pad
VCC
INP0
INN0
1
2
3
4
5
6
7
8
12
11
10
9
16
15
14
13
OUTP2
OUTN3
OUTP3
OUTN2
VAC_REF
CDCLVD2102
SCAS904A – MAY 2010 – REVISED JUNE 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Figure 2. CDCLVD2102 Block Diagram
TOP VIEW
2
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): CDCLVD2102



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