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CSD95482RWJ Fiches technique(PDF) 8 Page - Texas Instruments |
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CSD95482RWJ Fiches technique(HTML) 8 Page - Texas Instruments |
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8 / 13 page ![]() .000 PKG 0 ( ) 2.9 ( ) 2.25 ( ) 2.05 ( ) 1.275 ( ) 0.5 ( ) 0.3 ( ) 0.3 5X ( ) 1.15 5X ( ) 2 ( ) 2.6 ( ) TYP 3.2 ( ) 0.025 ( ) 2.2 ( ) 0.8 ( ) 0.4 ( ) 0.1 ( ) 0.3 ( ) 2.25 16X (0.6) 16X (0.25) 14X (0.45) 19X (0.45) ( ) 1.05 ( ) 2.05 ( ) 2.175 ( ) TYP 2.75 20X (0.25) (R0.05) TYP (0.05) MIN TYP ( 0.2) VIA TYP 7 LAND PATTERN EXAMPLE PKG METAL UNDER SOLDER MASK TYP SOLDER MASK OPENING, TYP 1 6 9 10 19 20 24 25 29 30 39 40 41 8 CSD95482RWJ SLPS688 – JUNE 2017 www.ti.com Product Folder Links: CSD95482RWJ Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated 9.2 Recommended PCB Land Pattern 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This package is designed to be soldered to thermal pads on the board. For more information, see QFN/SON PCB Attachment (SLUA271). |
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