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L6924D Fiches technique(PDF) 30 Page - STMicroelectronics |
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L6924D Fiches technique(HTML) 30 Page - STMicroelectronics |
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30 / 38 page ![]() Additional applications information L6924D 30/38 9 Additional applications information 9.1 Selecting input capacitor In most applications, a 1µF ceramic capacitor, placed close to the VIN and VINSN pins can be used to filter the high frequency noise. 9.1.1 Selecting output capacitor Typically, 1µF ceramic capacitor placed close to the VOUT and VOUTSN pin is enough to keep voltage control loop stable. This ensures proper operation of battery absent detection in removable battery pack applications. 9.2 Layout guidelines and demoboard description The thermal loop keeps the device at a constant temperature of approximately 120°C which in turn, reduces ICHG. However, in order to maximize the current capability, it is important to ensure a good thermal path. Therefore, the exposed pad must be properly soldered to the board and connected to the other layer through thermal vias. The recommended copper thickness of the layers is 70 µm or more. The exposed pad must be electrically connected to GND. Figure 24 shows the thermal image of the board with the power dissipation of 1W. In this instance, the temperature of the case is 89°C, but the junction temperature of the device is given by the following formula: Where the RTH J-A of the device mounted on board is 75°C/W, the power dissipated is 1W, and the ambient temperature is 25°C. In this case the junction temperature is: AMB DISS A THJ J T P R T + × = − Eq: 10-1 C T J o 100 25 1 75 = + × = Eq: 10-2 |
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