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STAC9752 Fiches technique(PDF) 13 Page - Integrated Device Technology |
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STAC9752 Fiches technique(HTML) 13 Page - Integrated Device Technology |
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13 / 95 page ![]() STAC9752/9753 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING IDT™ 13 STAC9752/9753 REV 3.3 1206 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING Note: 1. With +30dB Boost on, 1.00 Vrms with Boost off. 2. Ratio of Full Scale signal to noise output with -60dB signal, measured “A-weighted” over a 20 Hz to a 20 KHz bandwidth. 3. ± 1dB limits for Line Output & 0 dB gain, at -20dBV 4. Ratio of Full Scale signal to THD+N output with -3dB signal, measured “A-weighted” over a 20 Hz to a 20 KHz bandwidth. 48 KHz Sample Frequency 5. Ratio of Full Scale signal to idle channel noise output is measured “A-weighted” over a 20 Hz to a 20 KHz bandwidth. (AES17-1991 Idle Channel Noise or EIAJ CP-307 Signal-to-noise Ratio). HEADPHONE_OUT (32 Ω load) - -68 - dB HEADPHONE_OUT (10 K Ω load) - -81 - dB SNR (idle channel) (Note 5) DAC to LINE_OUT 80 90 - dB DAC in BYPASS Mode - 92 - dB LINE / AUX / VIDEO to LINE_OUT - 90 - dB LINE_IN to A/D with High Pass Filter enabled - 92 - dB A/D & D/A Digital Filter Pass Band (Note 6) 20 - 19,200 Hz A/D & D/A Digital Filter Transition Band 19,200 - 28,800 Hz A/D & D/A Digital Filter Stop Band 28,800 - - Hz A/D & D/A Digital Filter Stop Band Rejection (Note 7) -100 - - dB DAC Out-of-Band Rejection (Note 8) -55 - - dB Group Delay (48 KHz sample rate) - - 1 ms Power Supply Rejection Ratio (1 KHz) - -70 - dB Power Supply Rejection Ratio (20 KHz) - -40 - dB Any Analog Input to LINE_OUT Crosstalk (10 KHz Signal Frequency) - -80 - dB Any Analog Input to LINE_OUT Crosstalk (1 KHz Signal Frequency) - -100 - dB Spurious Tone Rejection - -100 - dB Attenuation, Gain Step Size - 1.5 - dB Input Impedance - 50 - K Ω Input Capacitance - 15 - pF VREFout - 0.5 X AVdd - V VREF - 0.45X AVdd - V Interchannel Gain Mismatch ADC - - 0.5 dB Interchannel Gain Mismatch DAC - - 0.5 dB Gain Drift - 100 - ppm/ºC DAC Offset Voltage - 10 20 mV Deviation from Linear Phase - - 1 degrees LINE_OUT / MONO_OUT Load Resistance 10 - - K Ω LINE_OUT / MONO_OUT Load Capacitance - - 50 pF HEADPHONE_OUT Load Resistance - 32 - Ω HEADPHONE_OUT Load Capacitance - - 100 pF Mute Attenuation 90 96 - dB PLL lock time - 100 200 µsec PLL 24.576 MHz clock jitter - - 750 psec PLL frequency multiplication tolerance - - 12.5 ppm PLL bit clock jitter - - 750 psec Parameter Min Typ Max Unit |
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