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SMC032BFY6 Fiches technique(PDF) 21 Page - STMicroelectronics |
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SMC032BFY6 Fiches technique(HTML) 21 Page - STMicroelectronics |
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21 / 91 page ![]() SMCxxxBF Electrical interface 21/91 –VS1, –VS2 (PC Card Memory Mode) O 33,40 Voltage Sense Signals.–VS1 is grounded so that the CIS can be read at 3.3 volts and –VS2 is reserved by PCMCIA for a secondary voltage. –VS1, –VS2 (PC Card I/O Mode) Same for all modes. –VS1, –VS2 (True IDE Mode) Same for all modes. –WAIT (PC Card Memory Mode) O 42 ST CF does not assert the WAIT (IORDY) signal –WAIT (PC Card I/O Mode) IORDY (True IDE Mode) –WE (PC Card Memory Mode) I36 Driven by the host to strobe memory write data to the registers. –WE (PC Card I/O Mode) Used for writing to the configuration registers. –WE (True IDE Mode) Not used, should be connected to VCC by the host. WP (PC Card Memory Mode) O24 No write protect switch available. It is held Low after the completion of the reset initialization sequence. –IOIS16 (PC Card I/O Mode) Used for the 16 bit Port (–IOIS16) function. Low indicates that a 16 bit or odd Byte only operation can be performed at the addressed port. –IOCS16 (True IDE Mode) Asserted Low when the Card is expecting a Word data transfer cycle. Table 9. Signal Description (continued) Signal Name Dir. Pin Description |
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